- Binary Data Pipeline - Part of the Leibniz subsystem (can be combined with Drezno and Lipsk) - Digital shift register and BBD delay for processing individual bits - Adjustable delay length from 1-64 stages and CV input - Switchable loop and scramble function (each with gate input) - Clock inputs for all 8 bits - Power requirement: 70mA (+12V) / 40mA (-12V) - Width: 8 HP EUR 254.00 - See more - Buy online